File: autosense_dittrich_inc.v

package info (click to toggle)
verilog-mode 20161124.fd230e6-2
  • links: PTS, VCS
  • area: main
  • in suites: buster, stretch
  • size: 3,764 kB
  • ctags: 5,143
  • sloc: lisp: 12,430; perl: 293; makefile: 146; sh: 35; fortran: 2
file content (9 lines) | stat: -rw-r--r-- 313 bytes parent folder | download 
1
2
3
4
5
6
7
8
9
 
parameter sel_a = {1'b 0, 1'b 0}; // 2'd 0 works fine
parameter sel_b = {1'b 0, 1'b 1}; // 2'd 1 works fine
parameter sel_c = 2'd 2,
            sel_d = 2'd 3;

//parameter sel_a = {1'b 0, 1'b 0}, // 2'd 0 works fine
//	  sel_b = {1'b 0, 1'b 1}, // 2'd 1 works fine
//	  sel_c = 2'd 2,
//          sel_d = 2'd 3;