File: indent_linefeed.v

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verilog-mode 20161124.fd230e6-2
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module foo;
   input a,b;
   
   always @(a) begin
      b <= #10 ~ a;
   end
endmodule // foo

module bar;
   // 
   input a,b;
   
   always @(a) begin // 
      b <= #10 ~  a;

      a;
   end
endmodule // foo