File: autoinst_sv_shaw.v

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verilog-mode 20161124.fd230e6-2
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module autoinst_sv_shaw
  (
   /*AUTOINOUTMODULE("Example_mod")*/
   // Beginning of automatic in/out/inouts (from specific module)
   input logic clk,
   input logic reset_b
   // End of automatics
   );
   
   Example_mod Ex1 (/*AUTOINST*/
                    // Inputs
                    .clk                (clk),
                    .reset_b            (reset_b));
   
endmodule

module Example_mod
  (
   input logic clk,
   input logic reset_b,
   );
endmodule