File: autoinstparam_iface_bruce.v

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verilog-mode 20161124.fd230e6-2
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module top;
   /*AUTOWIRE*/
   sub0 #(/*AUTOINSTPARAM*/
          // Parameters
          .testit2                      (testit2),
          .TESTIT                       (TESTIT))
   s0 (/*AUTOINST*/
       // Inputs
       .side_clk                        (side_clk),
       .side_rst_b                      (side_rst_b));
endmodule

module sub0
  #(
    parameter string testit2 = 0,
    int              TESTIT = 0
    ) (
       // clk and resets
       input logic side_clk,
       input logic side_rst_b,
       );
   
endmodule