File: check.conf

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verilog 0.8-4.2
  • links: PTS
  • area: main
  • in suites: etch, etch-m68k
  • size: 7,212 kB
  • ctags: 7,045
  • sloc: cpp: 42,254; ansic: 26,293; yacc: 3,452; sh: 2,773; makefile: 1,113
file content (4 lines) | stat: -rw-r--r-- 63 bytes parent folder | download | duplicates (11)
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functor:cprop
functor:nodangle
-t:dll
flag:DLL=tgt-vvp/vvp.tgt