package info
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verilog 0.8.6-1
- links: PTS
- area: main
- in suites: lenny
- size: 8,216 kB
- ctags: 7,454
- sloc: cpp: 45,273; ansic: 29,729; yacc: 3,538; sh: 2,773; makefile: 1,252
Folder: tgt-verilog
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.. (parent) | |||
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- | rw-r--r-- | 25 | .cvsignore |
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- | rw-r--r-- | 1,982 | Makefile.in |
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- | rw-r--r-- | 12,898 | verilog.c |