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;; @file
; IPRT - X86 and AMD64 Structures and Definitions that are not automatically
; converted from the C header file.
;
;
; Copyright (C) 2012-2025 Oracle and/or its affiliates.
;
; This file is part of VirtualBox base platform packages, as
; available from https://www.virtualbox.org.
;
; This program is free software; you can redistribute it and/or
; modify it under the terms of the GNU General Public License
; as published by the Free Software Foundation, in version 3 of the
; License.
;
; This program is distributed in the hope that it will be useful, but
; WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
; General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, see <https://www.gnu.org/licenses>.
;
; The contents of this file may alternatively be used under the terms
; of the Common Development and Distribution License Version 1.0
; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
; in the VirtualBox distribution, in which case the provisions of the
; CDDL are applicable instead of those of the GPL.
;
; You may elect to license modified versions of this file under the
; terms and conditions of either the GPL or the CDDL or both.
;
; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
;
%ifndef ___iprt_x86extra_mac
%define ___iprt_x86extra_mac
%define X86_XCPT_DE 0x00
%define X86_XCPT_DB 0x01
%define X86_XCPT_NMI 0x02
%define X86_XCPT_BP 0x03
%define X86_XCPT_OF 0x04
%define X86_XCPT_BR 0x05
%define X86_XCPT_UD 0x06
%define X86_XCPT_NM 0x07
%define X86_XCPT_DF 0x08
%define X86_XCPT_CO_SEG_OVERRUN 0x09
%define X86_XCPT_TS 0x0a
%define X86_XCPT_NP 0x0b
%define X86_XCPT_SS 0x0c
%define X86_XCPT_GP 0x0d
%define X86_XCPT_PF 0x0e
%define X86_XCPT_MF 0x10
%define X86_XCPT_AC 0x11
%define X86_XCPT_MC 0x12
%define X86_XCPT_XF 0x13
%define X86_XCPT_VE 0x14
%define X86_XCPT_SX 0x1f
%define PAGE_SIZE 0x1000
;; Same a ~(X86_CR0_PE | X86_CR0_PG) except it won't cause assembler warnings.
%define X86_CR0_NO_PE_NO_PG 0x7ffffffe
;;
; 32-bit protected mode fstenv image.
;
struc X86FSTENV32P
.FCW resw 1
.padding1 resw 1
.FSW resw 1
.padding2 resw 1
.FTW resw 1
.padding3 resw 1
.FPUIP resd 1
.FPUCS resw 1
.FOP resw 1
.FPUDP resd 1
.FPUDS resw 1
.padding4 resw 1
endstruc
;;
; The image saved by FXSAVE.
;
struc X86FXSTATE
.FCW resw 1
.FSW resw 1
.FTW resw 1
.FOP resw 1
.FPUIP resd 1
.FPUCS resw 1
.Rsrvd1 resw 1
.FPUDP resd 1
.FPUDS resw 1
.Rsrvd2 resw 1
.MXCSR resd 1
.MXCSR_MASK resd 1
.st0 resd 4
.st1 resd 4
.st2 resd 4
.st3 resd 4
.st4 resd 4
.st5 resd 4
.st6 resd 4
.st7 resd 4
.xmm0 resd 4
.xmm1 resd 4
.xmm2 resd 4
.xmm3 resd 4
.xmm4 resd 4
.xmm5 resd 4
.xmm6 resd 4
.xmm7 resd 4
.xmm8 resd 4
.xmm9 resd 4
.xmm10 resd 4
.xmm11 resd 4
.xmm12 resd 4
.xmm13 resd 4
.xmm14 resd 4
.xmm15 resd 4
.au32RsrvdRest resd 24
endstruc
struc X86TSS16
.selPrev resw 1
.sp0 resw 1
.ss0 resw 1
.sp1 resw 1
.ss1 resw 1
.sp2 resw 1
.ss2 resw 1
.ip resw 1
.flags resw 1
.ax resw 1
.cx resw 1
.dx resw 1
.bx resw 1
.sp resw 1
.bp resw 1
.si resw 1
.di resw 1
.es resw 1
.cs resw 1
.ss resw 1
.ds resw 1
.selLdt resw 1
endstruc
AssertCompileSize(X86TSS16, 44)
struc X86TSS32
.selPrev resw 1
.padding1 resw 1
.esp0 resd 1
.ss0 resw 1
.padding_ss0 resw 1
.esp1 resd 1
.ss1 resw 1
.padding_ss1 resw 1
.esp2 resd 1
.ss2 resw 1
.padding_ss2 resw 1
.cr3 resd 1
.eip resd 1
.eflags resd 1
.eax resd 1
.ecx resd 1
.edx resd 1
.ebx resd 1
.esp resd 1
.ebp resd 1
.esi resd 1
.edi resd 1
.es resw 1
.padding_es resw 1
.cs resw 1
.padding_cs resw 1
.ss resw 1
.padding_ss resw 1
.ds resw 1
.padding_ds resw 1
.fs resw 1
.padding_fs resw 1
.gs resw 1
.padding_gs resw 1
.selLdt resw 1
.padding_ldt resw 1
.fDebugTrap resw 1
.offIoBitmap resw 1
;.IntRedirBitmap resb 32 - this is optional.
endstruc
AssertCompileSize(X86TSS32,104)
struc X86TSS64
.u32Reserved resd 1
.rsp0 resq 1
.rsp1 resq 1
.rsp2 resq 1
.u32Reserved2 resd 2
.ist1 resq 1
.ist2 resq 1
.ist3 resq 1
.ist4 resq 1
.ist5 resq 1
.ist6 resq 1
.ist7 resq 1
.u16Reserved resw 5
.offIoBitmap resw 1
;.IntRedirBitmap resb 32 - this isn't really there!! VBox addition for x86TSS32 structure compatibility in x86.h.
endstruc
AssertCompileSize(X86TSS64, 104)
;; @name Helper values for the X86_MKOP_XXX macros.
;; @{
%define X86_MKOP_GREG8_al 0
%define X86_MKOP_GREG8_cl 1
%define X86_MKOP_GREG8_dl 2
%define X86_MKOP_GREG8_bl 3
%define X86_MKOP_GREG8_ah 4
%define X86_MKOP_GREG8_ch 5
%define X86_MKOP_GREG8_dh 6
%define X86_MKOP_GREG8_bh 7
%define X86_MKOP_GREG8_spl 20
%define X86_MKOP_GREG8_bpl 21
%define X86_MKOP_GREG8_sil 22
%define X86_MKOP_GREG8_dil 23
%define X86_MKOP_GREG8_r8b 8
%define X86_MKOP_GREG8_r9b 9
%define X86_MKOP_GREG8_r10b 10
%define X86_MKOP_GREG8_r11b 11
%define X86_MKOP_GREG8_r12b 12
%define X86_MKOP_GREG8_r13b 13
%define X86_MKOP_GREG8_r14b 14
%define X86_MKOP_GREG8_r15b 15
%define X86_MKOP_GREG16_ax 0
%define X86_MKOP_GREG16_cx 1
%define X86_MKOP_GREG16_dx 2
%define X86_MKOP_GREG16_bx 3
%define X86_MKOP_GREG16_sp 4
%define X86_MKOP_GREG16_bp 5
%define X86_MKOP_GREG16_si 6
%define X86_MKOP_GREG16_di 7
%define X86_MKOP_GREG16_r8w 8
%define X86_MKOP_GREG16_r9w 9
%define X86_MKOP_GREG16_r10w 10
%define X86_MKOP_GREG16_r11w 11
%define X86_MKOP_GREG16_r12w 12
%define X86_MKOP_GREG16_r13w 13
%define X86_MKOP_GREG16_r14w 14
%define X86_MKOP_GREG16_r15w 15
%define X86_MKOP_GREG32_eax 0
%define X86_MKOP_GREG32_ecx 1
%define X86_MKOP_GREG32_edx 2
%define X86_MKOP_GREG32_ebx 3
%define X86_MKOP_GREG32_esp 4
%define X86_MKOP_GREG32_ebp 5
%define X86_MKOP_GREG32_esi 6
%define X86_MKOP_GREG32_edi 7
%define X86_MKOP_GREG32_r8d 8
%define X86_MKOP_GREG32_r9d 9
%define X86_MKOP_GREG32_r10d 10
%define X86_MKOP_GREG32_r11d 11
%define X86_MKOP_GREG32_r12d 12
%define X86_MKOP_GREG32_r13d 13
%define X86_MKOP_GREG32_r14d 14
%define X86_MKOP_GREG32_r15d 15
%define X86_MKOP_GREG64_rax 0
%define X86_MKOP_GREG64_rcx 1
%define X86_MKOP_GREG64_rdx 2
%define X86_MKOP_GREG64_rbx 3
%define X86_MKOP_GREG64_rsp 4
%define X86_MKOP_GREG64_rbp 5
%define X86_MKOP_GREG64_rsi 6
%define X86_MKOP_GREG64_rdi 7
%define X86_MKOP_GREG64_r8 8
%define X86_MKOP_GREG64_r9 9
%define X86_MKOP_GREG64_r10 10
%define X86_MKOP_GREG64_r11 11
%define X86_MKOP_GREG64_r12 12
%define X86_MKOP_GREG64_r13 13
%define X86_MKOP_GREG64_r14 14
%define X86_MKOP_GREG64_r15 15
;; @}
;;
; Encodes the MODRM byte for an instruction with 8-bit operand size.
; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
; @param 2 The MODRM.REG register mnemonic.
; @param 3 The MODRM.RM register mnemonic.
%macro X86_MKOP_MODRM8 3
%assign x86_mkop_modrm8_iReg X86_MKOP_GREG8_ %+ %2
%assign x86_mkop_modrm8_iRm X86_MKOP_GREG8_ %+ %3
db X86_MODRM_MAKE(%1, x86_mkop_modrm8_iReg & 7, x86_mkop_modrm8_iRm & 7)
%endmacro
;;
; Encodes the optional REX prefix for an instruction with 8-bit operand size.
; @param 1 The MODRM.REG register mnemonic.
; @param 2 The MODRM.RM register mnemonic.
%macro X86_MKOP_REX8 2
%assign x86_mkop_rex8_iReg X86_MKOP_GREG8_ %+ %1
%assign x86_mkop_rex8_iRm X86_MKOP_GREG8_ %+ %2
%if x86_mkop_rex8_iReg >= 8 || x86_mkop_rex8_iRm >= 8
%if __BITS__ == 64
%if (x86_mkop_rex8_iReg < 4 || x86_mkop_rex8_iReg >= 8) && (x86_mkop_rex8_iRm < 4 || x86_mkop_rex8_iRm >= 8)
db X86_OP_REX | (((x86_mkop_rex8_iReg >> 3) & 1) * X86_OP_REX_R) | (((x86_mkop_rex8_iRm >> 3) & 1) * X86_OP_REX_B)
%else
%error X86_MKOP_REX8: Invalid operand mix: %1, %2
%endif
%else
%error X86_MKOP_REX8: not in 64-bit code: %1, %2
%endif
%endif
%endmacro
;;
; Encodes the MODRM byte for an instruction with 16-bit operand size.
; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
; @param 2 The MODRM.REG register mnemonic.
; @param 3 The MODRM.RM register mnemonic.
%macro X86_MKOP_MODRM16 3
%assign x86_mkop_modrm16_iReg X86_MKOP_GREG16_ %+ %2
%assign x86_mkop_modrm16_iRm X86_MKOP_GREG16_ %+ %3
db X86_MODRM_MAKE(%1, x86_mkop_modrm16_iReg & 7, x86_mkop_modrm16_iRm & 7)
%endmacro
;;
; Encodes the optional REX prefix for an instruction with 16-bit operand size.
; @param 1 The MODRM.REG register mnemonic.
; @param 2 The MODRM.RM register mnemonic.
%macro X86_MKOP_REX16 2
%assign x86_mkop_rex16_iReg X86_MKOP_GREG16_ %+ %1
%assign x86_mkop_rex16_iRm X86_MKOP_GREG16_ %+ %2
%if x86_mkop_rex16_iReg >= 8 || x86_mkop_rex16_iRm >= 8
%if __BITS__ == 64
db X86_OP_REX | ((x86_mkop_rex16_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex16_iRm >> 3) * X86_OP_REX_B)
%else
%error X86_MKOP_REX16: not in 64-bit code: %1, %2
%endif
%endif
%endmacro
;;
; Encodes the MODRM byte for an instruction with 32-bit operand size.
; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
; @param 2 The MODRM.REG register mnemonic.
; @param 3 The MODRM.RM register mnemonic.
%macro X86_MKOP_MODRM32 3
%assign x86_mkop_modrm32_iReg X86_MKOP_GREG32_ %+ %2
%assign x86_mkop_modrm32_iRm X86_MKOP_GREG32_ %+ %3
db X86_MODRM_MAKE(%1, x86_mkop_modrm32_iReg & 7, x86_mkop_modrm32_iRm & 7)
%endmacro
;;
; Encodes the optional REX prefix for an instruction with 32-bit operand size.
; @param 1 The MODRM.REG register mnemonic.
; @param 2 The MODRM.RM register mnemonic.
%macro X86_MKOP_REX32 2
%assign x86_mkop_rex32_iReg X86_MKOP_GREG32_ %+ %1
%assign x86_mkop_rex32_iRm X86_MKOP_GREG32_ %+ %2
%if x86_mkop_rex32_iReg >= 8 || x86_mkop_rex32_iRm >= 8
%if __BITS__ == 64
db X86_OP_REX | ((x86_mkop_rex32_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex32_iRm >> 3) * X86_OP_REX_B)
%else
%error X86_MKOP_REX32: not in 64-bit code: %1, %2
%endif
%endif
%endmacro
;;
; Encodes the MODRM byte for an instruction with 64-bit operand size.
; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
; @param 2 The MODRM.REG register mnemonic.
; @param 3 The MODRM.RM register mnemonic.
%macro X86_MKOP_MODRM64 3
%assign x86_mkop_modrm64_iReg X86_MKOP_GREG64_ %+ %2
%assign x86_mkop_modrm64_iRm X86_MKOP_GREG64_ %+ %3
db X86_MODRM_MAKE(%1, x86_mkop_modrm64_iReg & 7, x86_mkop_modrm64_iRm & 7)
%endmacro
;;
; Encodes the REX prefix for an instruction with 64-bit operand size.
; @param 1 The MODRM.REG register mnemonic.
; @param 2 The MODRM.RM register mnemonic.
%macro X86_MKOP_REX64 2
%assign x86_mkop_rex64_iReg X86_MKOP_GREG64_ %+ %1
%assign x86_mkop_rex64_iRm X86_MKOP_GREG64_ %+ %2
%if __BITS__ == 64
db X86_OP_REX_W | ((x86_mkop_rex64_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex64_iRm >> 3) * X86_OP_REX_B)
%else
%error X86_MKOP_REX64: not in 64-bit code: %1, %2
%endif
%endmacro
%endif
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