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xschem 3.4.4-1
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<!DOCTYPE html>

<html>
  <head>
    <title>xschem schematic circuit editor - VHDL Verilog Spice
      netlister</title>
    <meta content="stefan.schippers@gmail.com" name="author">
    <meta content="EDA tool for drawing hierarchical circuit schematics
      and making Spice - Verilog - VHDL netlists for simulation"
      name="description">
    <link rel="stylesheet" type="text/css" href="style.css" />
    <style type="text/css">
      h2 { 
            text-shadow: 10px 10px 9px #aa4;
      }
      .just { text-align: justify; }
    </style>

  </head>
  <body>
  <iframe class="menu_iframe"  seamless src="menu_xschem.html"> </iframe>
  <div  class="body1">


    <div 
         style="background:url(xschem.png);background-size: 100% 150px; 
         width:100%; height: 150px;"
    >
    <h1><br>
        XSCHEM : schematic capture<br>and netlisting EDA tool
    </h1>
    </div>
    <br>
    <p class='just'>
    <b>Xschem</b> is a schematic capture program, it allows creation of
    hierarchical representation of circuits with a top down approach . 
    By focusing on interfaces, hierarchy and instance properties a 
    complex system can be described in terms of simpler building blocks.
    A VHDL or Verilog or Spice netlist can be generated from 
    the drawn schematic, allowing
    the simulation of the circuit. Key feature of the program is its
    drawing engine written in C and using directly the Xlib drawing
    primitives; this gives very good speed performance, even on very
    big circuits. The user interface is built with the Tcl-Tk toolkit,
    tcl is also the extension language used.<br></p>
    <h2 style="text-align: center;">Features</h2>
    <ul>
      <li>hierarchical schematic drawings, no limits on size</li>
      <li>any object in the schematic can have any sort of properties
        (generics in VHDL, parameters in Spice or Verilog)<br>
      </li>
      <li>new Spice/Verilog primitives can be created, and the netlist
        format can be defined by the user</li>
      <li>tcl extension language allows the creation of scripts; any
        user command in the drawing window has an associated tcl comand</li>
      <li>VHDL / Verilog / Spice netlist, ready for simulation</li>
      <li>Behavioral VHDL / Verilog code can be embedded as one of the
        properties of the schematic block, <br>
      </li>
    </ul>
    <br>
    Xschem runs on UNIX systems with X11 and Tcl-Tk toolkit installed.<br>
    <br>
    <div style="text-align: center;">
      <h2>Project status</h2>
      <br>
      <table style="width: 60%; text-align: left; margin-left: auto; box-shadow: 10px 10px 9px #aa4;
        margin-right: auto;border: groove 2px;" cellpadding="2" cellspacing="2">
        <tbody>
          <tr>
            <td ><b>date</b>
            </td>
            <td ><b>version</b>
            </td>
            <td style="text-align: left;"><b>notes</b>
            </td>
          </tr>
          <tr>
            <td >19980804
            </td>
            <td >0.1
            </td>
            <td >First draft
            </td>
          </tr>

          <tr>
            <td >20040202
            </td>
            <td >1.0
            </td>
            <td >First release
            </td>
          </tr>
          <tr>
            <td >20161203<br>
            </td>
            <td >2.0<br>
            </td>
            <td >Second release, uploading on sourceforge<br>
            </td>
          </tr>


          <tr>
            <td >20200217<br>
            </td>
            <td >2.9.5<br>
            </td>
            <td >2.9.5 release, uploading on repo.hu and sourceforge<br>
            </td>
          </tr>

          <tr>
            <td >20210211<br>
            </td>
            <td >2.9.9<br>
            </td>
            <td >2.9.9 release, skywater 130nm pdk integration<br>
            </td>
          </tr>

          <tr>
            <td >20210911<br>
            </td>
            <td >3.0.0<br>
            </td>
            <td >3.0.0 release, now including windows binary distribution<br>
            </td>
          </tr>

          <tr>
            <td >20220721<br>
            </td>
            <td >3.1.0<br>
            </td>
            <td >3.1.0 release, ability to display simulation graphs and embeded images/logos<br>
            </td>
          </tr>
          <tr>
            <td >20230521<br>
            </td>
            <td >3.4.0<br>
            </td>
            <td >3.4.0 release, instance based implementation selection, graph exporting in svg and pdf, 
                 much more schematic annotation (live transient/sweep annotation), schematic/symbol PCELLS
            </td>
          </tr>


          <tr>
            <td ><br>
            </td>
            <td ><br>
            </td>
            <td ><br>
            </td>
          </tr>
        </tbody>
      </table>
      <br>
    </div>
    <br>
    <h2 style="text-align: center;">Documentation</h2>
    <div style="text-align: center;">
      <a href="xschem_man/xschem_man.html" target="_blank">XSCHEM manual</a>
      <br>
    </div>
    <h2 style="text-align: center;">Download RELEASED Source code</h2>
    <div style="text-align: center;">
      <a href="http://repo.hu/projects/xschem/releases">Current release</a>
      <br>
      <a href="https://sourceforge.net/projects/xschem/" target="_blank">XSCHEM releases on Sourceforge</a>
      <br>
    </div>

    <h2 style="text-align: center;">Download Development source code </h2>
    <div style="margin: auto; width: 60%;">
    <ul>
    <li>SVN on repo.hu (primary development site): <br><kbd>svn checkout svn://repo.hu/xschem/trunk xschem-src</kbd></li>
    <li>SVN on sourceforge.net: <br><kbd>svn checkout https://svn.code.sf.net/p/xschem/code/ xschem-src</kbd></li>
    <li>GIT on github.com: <br><kbd>git clone https://github.com/StefanSchippers/xschem.git xschem-src</kbd></li>
    </ul>
      <br>
    </div>


    <h2 style="text-align: center;">Download Windows Binary</h2>
    <div style="text-align: center;">
      <a href="http://repo.hu/projects/xschem/releases-bin">Current release</a>
      <br>
    </div>


    <h2 style="text-align: center;">License</h2>
    <div style="text-align: center;">The software is released under
      the GNU GPL, General Public License<br>
      <br>
      <h2>Contact</h2>
      Anyone interested in this project please contact me at the
      following address:<br>
        <h4>STEFAN.SCHIPPERS@GMAIL.COM</h4><br>
      <br>
    </div>
    <h2 style="text-align: center;">Software requirements:</h2>
    - X11<br>
    - tcl-tk libs and developent files<br>
    - c99 compiler<br>
    - bison (only for compiling the grammar parser)<br>
    - flex (only for compiling the lexical analyzer<br>
    - Xpm library and -dev header files<br>
    - awk (tested with gawk and mawk)<br>
    <div style="text-align: center;">
      <h2>Systems tested:</h2>
    </div>
    - Linux debian / Redhat<br>
    - Solaris sparc<br>
    - Windows (with the cygwin layer and cygwin/Xorg X11 server,
    plus the tcl/tk toolkit and the -dev libraries) <br>
    <br>
    <br>
    <div style="text-align: center;"><br>
    </div>
    <h2 style="text-align: center;">Screenshots<br>
    </h2>
    <div style="text-align: center;">
      <div style="text-align: left;">
        <ul>
          <li>analog circuit example<br>
          </li>
        </ul>
      </div>
      <br>
      <img style=" border:5px solid #996622 ; box-shadow: 10px 10px 9px #aa4;"
        alt="analog circuit
        example" title="analog circuit example" src="xschem1.png"><br>
      <br>
      <div style="text-align: left;">
        <ul>
          <li>digital system for VHDL simulation<br>
          </li>
        </ul>
      </div>
      <br>
      <img style=" border:5px solid #996622;box-shadow: 10px 10px 9px #aa4;" 
        alt="dicital example"
        title="digital example" src="xschem2.png"><br>
    </div>
    <br>
  </div>
  </body>
</html>