1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
|
/*
* yosys -- Yosys Open SYnthesis Suite
*
* Copyright (C) 2021 Marcelina Kościelnicka <mwk@0x04.net>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef MEMLIB_H
#define MEMLIB_H
#include <string>
#include <vector>
#include "kernel/yosys.h"
YOSYS_NAMESPACE_BEGIN
namespace MemLibrary {
enum class RamKind {
Auto,
Logic,
NotLogic,
Distributed,
Block,
Huge,
};
enum class WidthMode {
Single,
Global,
PerPort,
};
enum class MemoryInitKind {
None,
Zero,
Any,
NoUndef,
};
enum class PortKind {
Sr,
Ar,
Sw,
Srsw,
Arsw,
};
enum class ClkPolKind {
Anyedge,
Posedge,
Negedge,
};
enum class RdWrKind {
Undefined,
NoChange,
New,
Old,
NewOnly,
};
enum class ResetValKind {
None,
Zero,
Any,
NoUndef,
Init,
};
enum class SrstKind {
None,
Ungated,
GatedClkEn,
GatedRdEn,
};
enum class WrTransTargetKind {
All,
Group,
};
enum class WrTransKind {
New,
Old,
};
struct WrTransDef {
WrTransTargetKind target_kind;
int target_group;
WrTransKind kind;
};
struct PortVariant {
dict<std::string, Const> options;
PortKind kind;
int clk_shared;
ClkPolKind clk_pol;
bool clk_en;
bool width_tied;
int min_wr_wide_log2;
int max_wr_wide_log2;
int min_rd_wide_log2;
int max_rd_wide_log2;
bool rd_en;
RdWrKind rdwr;
ResetValKind rdinitval;
ResetValKind rdarstval;
ResetValKind rdsrstval;
SrstKind rdsrstmode;
bool rdsrst_block_wr;
bool wrbe_separate;
std::vector<int> wrprio;
std::vector<WrTransDef> wrtrans;
};
struct PortGroup {
bool optional;
bool optional_rw;
std::vector<std::string> names;
std::vector<PortVariant> variants;
};
struct RamClock {
std::string name;
bool anyedge;
};
struct Ram {
IdString id;
RamKind kind;
dict<std::string, Const> options;
std::vector<PortGroup> port_groups;
bool prune_rom;
int abits;
std::vector<int> dbits;
WidthMode width_mode;
std::string resource_name;
int resource_count;
double cost;
double widthscale;
int byte;
MemoryInitKind init;
std::vector<std::string> style;
std::vector<RamClock> shared_clocks;
};
struct Library {
std::vector<Ram> rams;
};
Library parse_library(const std::vector<std::string> &filenames, const pool<std::string> &defines);
}
YOSYS_NAMESPACE_END
#endif
|
