File: parameters_across_files.ys

package info (click to toggle)
yosys 0.52-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 69,796 kB
  • sloc: ansic: 696,955; cpp: 239,736; python: 14,617; yacc: 3,529; sh: 2,175; makefile: 1,945; lex: 697; perl: 445; javascript: 323; tcl: 162; vhdl: 115
file content (21 lines) | stat: -rw-r--r-- 317 bytes parent folder | download 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
 
read_verilog -sv <<EOF
parameter Q = 1;
EOF
read_verilog -sv <<EOF
parameter P = Q;
module top(
    output integer out
);
    assign out = P;
    always @*
        assert (out == 1);
endmodule
EOF

hierarchy
proc
flatten
opt -full
async2sync
select -module top
sat -verify -seq 1 -tempinduct -prove-asserts -show-all